It is well known to manufacture a semiconductor package containing a semiconductor chip that is inverted or “flipped” such that the pads for making contact with the internal circuitry in the chip face the package's leads or contacts. Normally this means that the pads face downward, although it is possible to have the pads face upward if the leads are situated above the chip. Solder balls or “bumps” extend from the electrical contact pads on the chip. The solder balls or bumps are positioned in contact with or in close proximity to the leads or contacts, and the solder in each ball or bump is heated or “reflowed” to form an electrical path between the chip and the lead or contact.
A flip-chip package 10 is shown in FIG. 1. A pair of leads 12 protrude from the sides of package 10, allowing package 10 to be mounted on a flat surface such as a printed circuit board. Package 10 contains a semiconductor chip 14 having metal bonding pads 16. Chip 14 is oriented such that the bonding pads 16 face downward towards the inner ends of leads 12. Electrical contact between leads 12 and bonding pads 16 is made through solder balls 18. This structure is then encapsulated in a molding compound 19, which is normally a plastic material.
FIG. 2 shows a no-lead package 20, which contains contacts 22 instead of leads 12. The edges of contacts 22 are flush with the sides and bottom of package 20, allowing package 20 to be mounted in a smaller space than package 10. Electrical contact is made between bonding pads 16 on chip 14 and the top surfaces of contacts 22 via solder balls 18 in the manner described above.
There are several techniques for manufacturing a flip-chip package, in particular for creating an electrical contact between the die pads and the leads or contacts by means of the solder balls. One technique is illustrated in FIGS. 3A-3C. Chip 14 is manufactured with a high-lead (high-Pb) solder “bump” or ball 32 attached to bonding pad 16. A layer 34 of lead-free (PB-free) solder paste is printed on the lead or contact, represented here by leadframe 36. Leadframe 36 may be a portion of a leadframe used in manufacturing a leaded or no-lead package. Chip 14 is lowered towards leadframe 36 until solder ball 32 is in contact with solder paste layer 34, and the solder is reflowed. As shown in FIG. 3B, in this situation the solder paste 34 often spreads out, and solder ball 32 collapses, leading to a low separation or “standoff” between chip 14 and leadframe 36. As shown in FIG. 3C, this low standoff may prevent the molding compound 39 from flowing properly to fill the space between chip 14 and leadframe 36, and this can lead to open spaces or voids 38 in molding compound 39.
As shown in FIGS. 3B and 3C, the high-lead content solder ball 32 and lead-free solder paste layer 34 do not mix significantly. The process shown in FIGS. 4A-4C is similar to the process shown in FIGS. 3A-3C except that a lead-free solder ball 42 is used in place of high-lead solder ball 32. During reflow, as shown in FIG. 4B, a mass 44 of lead-free solder is formed between chip 14 and leadframe 36, which spreads out and again results in a low standoff between chip 14 and leadframe 36. As shown in FIG. 4C, this prevents the molding compound 46 from flowing in to the gap between chip 14 and leadframe 36, and again produces voids 48 in the finished package.
The process shown in FIGS. 5A-5D has two variations. In both, lead-free solder ball 42 is attached to chip 14. In the process of FIG. 5A, solder ball 42 is dipped in a solder flux, producing a flux layer 50 on solder ball 42. In the process of FIG. 5B, a layer 52 of flux is printed on leadframe 36. In either case, as shown in FIG. 5C, solder ball 42 collapses during reflow to form a lead-free mass of solder 54, resulting in a very low standoff between chip 14 and leadframe 36 and producing the voids 56 shown in FIG. 5D.
Accordingly, there is a clear need for a technique that prevents the solder from spreading out during reflow and the consequent low standoff between the chip and leadframe.